The initial part was , a later A suffix version was upward compatible and usable with the or processor. The combines multiple interrupt input sources into a single interrupt output to the host microprocessor, extending the interrupt levels available in a system beyond the one or two levels found on the processor chip. The was introduced as part of Intel's MCS 85 family in However, while not anymore a separate chip, the A interface is still provided by the Platform Controller Hub or Southbridge chipset on modern x86 motherboards.
|Published (Last):||15 October 2004|
|PDF File Size:||3.73 Mb|
|ePub File Size:||17.41 Mb|
|Price:||Free* [*Free Regsitration Required]|
Ideal for ASIC ,. Integrated HDD Solution , solutions 1. A software. July Description Figure 1. Marking high.
Port ". Built-in two A compatible interrupt controllers. Abstract: lt6ma 02F9 oti chipset NEC serial port intel sx Text: control logic indudes two Intel A compatible interrupt controllers. Blue Chip Technology Ltd. Built-in two compatible DMA controllers. Abstract: M M Text: information. Controller which is a superset of the A ; four 16bit Programmable Interval Timers which are , equivalent of three enhanced A Programmable Interrupt Controllers.
These controllers can all be operated , vector mapping than was available with the A. An interrupt is provid ed to alert the system that an attempt is being made to program the vectors in the method of the A.
8259A CONTROLLER. Datasheet pdf. Equivalent
PROGRAMMABLE INTERRUPT CONTROLLER