STM32F103RBT6 DATASHEET PDF

The devices operate from a 2. A comprehensive set of power-saving mode allows the design of low-power applications. The STM32Fxx medium-density performance line family includes devices in six different package types: from 36 pins to pins. Depending on the device chosen, different sets of peripherals are included, the description below gives an overview of the complete range of peripherals proposed in this family. These features make the STM32Fxx medium-density performance line microcontroller family suitable for a wide range of applications such as motor drives, application control, medical and handheld equipment, PC and gaming peripherals, GPS platforms, industrial applications, PLCs, inverters, printers, scanners, alarm systems, video intercoms, and HVACs. Distributor reported inventory date:

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Contents Contents 1 Introduction. Contents 8 Revision history. Device summary. List of tables Table ADC characteristics. STM32Fxx performance line block diagram. List of figures Figure Recommended footprint dimensions in mm Figure LFBGA - low profile fine pitch ball grid array package outline. This datasheet provides the ordering information and mechanical device characteristics of the STM32Fx8 and STM32FxB medium-density performance line microcontrollers. Description 2. Chann els Description Figure 2.

It has been developed to provide a low-cost platform that meets the needs Each line can be independently configured Description in reset mode when V external reset circuit. The DMA controller supports circular buffer management avoiding the generation of interrupts when the controller reaches the end of the buffer. It has complementary PWM outputs with programmable inserted dead-times. It can also be seen as a complete general-purpose timer. The Most of the GPIO pins are shared Pinouts and pin description Figure 4.

Pinouts and pin description Figure 6. Pinouts and pin description Figure 9. Pinouts and pin description Table 5. This alternate function can be remapped by software to some other port pins if available on the used package. Memory mapping 4 Memory mapping The memory map is shown in Figure Electrical characteristics Figure Pin loading conditions 5.

Current consumption measurement scheme 5. These are stress ratings only and functional Electrical characteristics Table 7. General operating conditions continued Symbol Power dissipation for suffix suffix 7 Ambient temperature for 6 suffix version T A Ambient temperature for 7 suffix version T Junction temperature range Electrical characteristics Table Maximum current consumption in Run mode, code with data processing running from Flash Symbol Parameter Supply current Run mode 1.

Based on characterization, not tested in production. External clock is 8 MHz Typical current consumption in Run mode versus frequency at 3 code with data processing running from RAM, peripherals enabled Figure Typical current consumption Typical and maximum current consumptions in Stop and Standby modes Symbol Parameter Regulator in Run mode, low-speed and high-speed internal RC oscillators and high-speed oscillator OFF no independent watchdog Supply current in Stop mode Regulator in Typical current consumption in Stop mode with regulator in Run mode versus temperature at V 50 0 Figure Typical current consumption in Stop mode with regulator in Low-power mode Typical current consumption in Standby mode versus temperature 3.

Typical values are measures Add an additional power consumption of Typical values are measures Add an additional power consumption of 0. High-speed external user clock The wakeup times are measured from the wakeup event to the point in which the user application code reads the first Guaranteed by design, not tested in production. Table Electrostatic discharge ESD Electrostatic discharges a Electrical characteristics 5.

Unless otherwise specified, the parameters given in performed under the ambient temperature and V in Table 9. The reset network protects the device against parasitic resets. Measurement points are done at CMOS levels: 0. SCL frequency SPI characteristics Symbol f Here from bit resolution. R AIN T cycles s 1. ADC DC accuracy values are measured after internal calibration.

Better performance could be Package characteristics 6 Package characteristics 6. Drawing is not to scale. Package characteristics Figure The back-side pad is not internally LFBGA - low profile fine pitch ball grid array package outline 1. LFBGA - low profile fine pitch ball grid array Recommended PCB design rules 0. LQFP pin low-profile quad flat package outline 26 Pin identification e 1. Dimensions are in LQFP64 mm, pin low-profile quad flat package outline Drawing is not to scale.

Dimensions are in millimeters. LQFP64 mm, pin low-profile quad TFBGA64 - active ball array mm, 0. TFBGA64 - active ball array, Recommended PCB design rules for pads 0. Package characteristics 6. Revision history 8 Revision history Table Package mechanical Revision history Table Small text changes. CRC feature added see unit on page 9 and Figure Memory Capacitance modified in Figure Power supply scheme on page Table notes revised in Section 5: Electrical Table Typical and maximum Information in this document is provided solely in connection with ST products.

About Contact Requests Pricing Request parts. My request: 0 parts. Bonase Electronics HK Co. Part Number:. HardFindElectronics Ltd. Request R. Page 2 Contents Contents 1 Introduction. Page 4 Contents 8 Revision history. Page 6 List of tables Table Page 8 List of figures Figure Page Page 10 Description 2. Page 12 Description Figure 2. Page 14 Description 2. Page 16 Description in reset mode when V external reset circuit. Page 20 Description 2.

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