EC2303 COMPUTER ARCHITECTURE AND ORGANIZATION LECTURE NOTES PDF

Department : B. Explain various assembler directives used in assembly language program Discuss various issues to be considered while assigning the ISA of a processor What are stack and queues?

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It is sometimes called the von Neumann machine, since the paper describing its design was edited by John von Neumann, a mathematics professor at both Princeton University and IAS. The computer was built from late until under his direction. The general organization is called Von Neumann architecture. This is regarded as the Prototype of all subsequent general-purpose computers.

Memory: The basic unit of information in the IAS computer is a bit word, which is the standard unit of information stored in a memory location or transferred in one step between the CPU and the main memory M. The size of the main memory is 4K 40 bit words and a secondary storage of 16K words based on electromechanical magnetic drum technology was provided for bulk storage.

Each location in M can be used to store either a single bit number or else a pair of bit instructions. Data Format:. If M X denotes the bit memory word with address X, then M X, denotes the half word consisting of bits 0 through 19 of M X , also called as left instruction and M X, denotes the half word consisting of bits 20 through 39 of M X , also called as right instruction.

The Program Control unit and the Data Processing unit contain storage locations, called registers. The PCU has circuits to interpret opcodes and to issue control signals to the DPU, memory and other circuits involved in executing instructions. The PCU can modify the instruction execution sequence when required to do so by branch instructions. Registers: Instruction register IR : It is one of the major components of PCU and contains the 8-bit opcode instruction being executed.

Instruction buffer register IBR : The IAS fetches two instructions at a time from memory, so it contains a second register, the instruction buffer register for holding a second instruction. Address register AR : It holds the address of a data operand to be fetched from or sent to main memory. Program Counter PC : contains the address of the next instruction to be fetched from memory. Data register DR : Data register normally contains a word to be stored in memory, or issued to receive a word from memory.

Accumulator AC and multiplier quotient MQ : The accumulator is a special register normally used for arithmetic operations and holds the end result of the operation. The MQ is a special register used for multiplication and division operation. Program control or branch instructions: These instructions determine the sequence in which instructions are executed. Instruction execution can be made dependent on a condition, thus allowing decision points.

It also performs the operation of address computation in the ALU and then it is inserted into instructions stored in memory. Instruction Execution: The IAS fetches and executes instructions in several steps that form an instruction cycle.

The IAS fetches two instructions in an instruction cycle. Each instruction cycle consists of two sub cycles. Fetch cycle: The opcode of the next instruction is loaded into the IR and the address portion is loaded into the AR. Execute cycle: The control circuitry interprets the opcode and executes the instruction by sending out the appropriate control signals to cause data to be moved or an operation to be performed by the ALU.

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